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DIP-8 / SOP-8 · 24LC256
Active256Kb I2C EEPROM
24LC256
Microchip Technology · DIP-8 / SOP-8 · 256Kb I2C EEPROM
Price on Request
Get a competitive quote within 24 hours. Volume discounts available. Shenzhen stock ships in 1-2 business days.
Overview
The 24LC256 is Microchip's 256 Kbit (32K × 8) serial EEPROM and one of the most widely deployed nonvolatile memories in embedded systems. It talks over the standard 2-wire I2C bus at up to 400 kHz on supplies from 2.5 V to 5.5 V (400 kHz is guaranteed across the full 2.5-5.5 V range, with 1 MHz possible at 4.5-5.5 V on the standard part), so it drops into virtually any MCU design with two free pins and a pair of pull-ups.
Internally the array pages in 64-byte blocks — the page write buffer is what makes firmware storage efficient — with a 5 ms maximum write cycle, byte and page write support, and hardware write protection via the WP pin. Endurance is rated at one million erase/write cycles minimum with 200-year data retention, figures that comfortably outlast the products they live in. Three address pins (A0-A2) allow eight devices at 0x50-0x57 to share one bus, and the low-power CMOS design draws about 1 mA active, 1 µA standby at 5.5 V. Packaging spans 8-pin DIP, SOIC, MSOP and TSSOP, plus automotive-qualified AEC-Q100 siblings (24AA256/24LC256-I).
In the B2B market the 24LC256 is dual-sourced across Microchip and second vendors (Onsemi CAT24C256, ST M24256, GigaDevice equivalents), all pin- and command-compatible — a strong second-source story for supply-chain resilience. Counterfeiting shows up as remarked lower-density parts (24LC64 relabeled as 24LC256); a simple capacity probe — write/read patterns at addresses 0x4000 and 0x7FFF — instantly exposes them, and genuine parts answer ACK exactly at the specified timing. Shenzhen stock is abundant; MOQ from 100 pcs loose to full reels of 3,300.
Key Features
- 256 Kbit (32K × 8) I2C EEPROM, 400 kHz across 2.5-5.5 V supply
- 64-byte page write, 5 ms write cycle, WP hardware write-protect pin
- 1,000,000-cycle endurance and 200-year data retention
- Eight bus addresses (0x50-0x57); DIP-8/SOP-8/MSOP/TSSOP options
Typical Applications
- Configuration and calibration storage in instruments and meters
- White-goods appliance parameters, serial numbers and usage logs
- SPD-style board identity and FRU data on server backplanes
- Medical device event logging and firmware data tables
- Arduino/ESP datalogging shields and RTC backup memory
Specifications
- Density
- 256 Kbit (32K x 8)
- Interface
- I2C (up to 400 kHz)
- Supply Voltage
- 2.5 to 5.5 V
- Page Size
- 64 bytes
- Write Cycle Time (Max)
- 5 ms
- Endurance
- 1000000 cycles
- Data Retention
- 200 years
- Device Addressing
- 0x50 to 0x57 (3 address pins)
- Pins
- 8
- RoHS
- Compliant
Procurement Tips
Keep the 24LC256 on an AVL with at least one pin-compatible second source (CAT24C256/M24256) to ride out allocations, and specify the industrial suffix (-I) if the product ever lives outdoors — commercial-grade parts stop at 70 °C.
Frequently Asked Questions
What is the difference between 24LC256, 24LC512 and 24LC1025?
Same family and pinout, different density: 256 Kbit, 512 Kbit and 1 Mbit respectively. The 24LC512 and 24LC1025 use a block-select bit in the address word. The 24LC256 addresses the full 32 KB with two address bytes — the simplest driver of the three.
Can I replace the 24LC256 with an AT24C256 or CAT24C256?
Yes. Atmel/Microchip AT24C256, Onsemi CAT24C256 and ST M24256 are command- and pin-compatible second sources with equivalent endurance. Check the write-page size (64 bytes on all of these) and the exact supply minimum (some clones start at 1.8 V, which is fine as a superset).
Why does my 24LC256 sometimes ignore writes?
Three usual suspects: (1) writes during the 5 ms busy window without ACK polling — always poll the device address until it ACKs before the next write; (2) page-boundary wrap — a page write that crosses a 64-byte boundary wraps to the page start, so split multi-page writes yourself; (3) WP pin left floating or high, which blocks writes to protected regions.
How fast is a full-chip image write over I2C?
At 400 kHz with 64-byte page writes and ACK polling, practical throughput is around 2-3 KB/s, so programming all 32 KB takes roughly 12-16 seconds. Use the 1 MHz mode (4.5-5.5 V) if your bus supports it to cut this in half.
How do I detect counterfeit or relabeled 24LC256 chips?
Write a unique pattern near the top of the address space (e.g. 0x7F00-0x7FFF) and verify readback after power cycling; a remarked 24LC64 will mirror the data at its smaller boundary. Also confirm ACK behavior at all eight device addresses and check Microchip laser marking and date-code traceability.
Is the 24LC256 suitable for frequent datalogging?
Yes within its endurance budget: one million cycles per byte. Logging every second to rotating sectors spreads wear and yields decades of life; for logging faster than that, consider FRAM (e.g. FM24V series) which has effectively unlimited writes and the same I2C interface.
What is the MOQ and lead time?
MOQ 100 pcs loose or 1 reel (3,300 pcs SOP-8) for production. Shenzhen stock ships in 1-2 business days; Microchip authorized channel replenishment is 4-8 weeks.
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