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SOP-8 (208-mil) · W25Q32JV
Winbond · SOP-8 (208-mil) · 32Mbit SPI NOR Flash
Price on Request
Get a competitive quote within 24 hours. Volume discounts available. Shenzhen stock ships in 1-2 business days.
The W25Q32JV is the 32 Mbit (4 MB) entry in Winbond's W25QxxJV serial NOR flash family, the workhorse external code storage for microcontrollers that outgrow their internal flash. It operates from a single 2.7 V to 3.6 V supply and speaks standard SPI, Dual SPI and Quad SPI instruction sets (plus QPI continuous-read mode) with clocks up to 133 MHz — enough to execute code directly via XIP on ESP32, STM32 and FPGA soft cores at tens of MHz effective bandwidth.
The array is organized as 1024 erasable 4 KB sectors, with 32 KB and 64 KB block erase for bulk operations and 256-byte programmable pages; erase/program endurance is 100,000 cycles with 20-year retention. Beyond storage it includes 3 x 256-byte security registers, unique 64-bit serial number, software and hardware write protection (WP#/HOLD# pins), and erase/program suspend-resume. The 208-mil SOP-8 is breadboard and hand-solder friendly; WSON-8 and SOIC-8 variants cover compact assemblies.
Sourcing reality for SPI NOR flash deserves emphasis: this is one of the most counterfeited component categories on the broker market. The classic fraud is relabeling — a W25Q32 die remarked as W25Q128, or used chips re-tinned and re-marked — which passes a superficial JEDEC-ID check on the small part but fails on the larger one. Verification means reading the JEDEC manufacturer/device ID (Winbond = 0xEF, W25Q32JV = 0x4016), then probing the reported capacity boundary with unique patterns at high addresses; a relabeled 32 Mbit part will alias or ignore writes past 4 MB. Genuine Winbond stock has crisp laser marking, uniform matte-tin leads and consistent date codes. Shenzhen stock is deep; MOQ from cut tape to reels of 2,000+.
For SPI NOR flash, buy only from lots you can capacity-probe: require the supplier to test JEDEC ID plus a high-address write/read pattern on samples. Price far below the Winbond channel is the single strongest counterfeit signal in this category.
Same 32 Mbit density and instruction set, different supply range: the JV is the standard 2.7-3.6 V part, while the JW runs at 1.65-1.95 V for 1.8 V systems. Pick by your SPI rail — they are not interchangeable without checking VCC.
Generally yes. The JV generation is backward compatible on the core command set and adds QPI-mode and suspend/resume refinements; footprint and JEDEC family ID (0x40xx) are consistent. Firmware that uses standard/dual/quad reads and sector erase runs on both, though confirm your driver does not depend on JV-only status bits.
Read the JEDEC ID (expect 0xEF 0x40 0x16), then write unique patterns near 4 MB-1 and read back after erase cycles; a remarked smaller part aliases at its true boundary. Also inspect marking quality — genuine Winbond uses sharp laser etch with a pin-1 dimple, and date codes are traceable. We electrically capacity-probe samples from every broker lot.
Page program of 256 bytes takes about 0.4 ms typical (3 ms max), so programming the full 4 MB with verification runs roughly 10-20 seconds at 80-133 MHz quad clocks. 4 KB sector erase is ~45 ms typical, 120 ms max — plan OTA flows around erase time and use suspend/resume to keep reads responsive.
Yes — that is its primary role. At 133 MHz quad SPI the raw bandwidth is ~66 MB/s; ESP32-class XIP runs typically achieve 10-40 MHz equivalent instruction fetch after controller overhead. Use the continuous-read (wrap) modes and keep vector tables cached in RAM for best performance.
Yes — tie WP# and HOLD# high (typically 10 kΩ) unless you use hardware write protection. A floating HOLD# pin is a classic field-failure cause: the chip randomly ignores commands. Both pins are active low.
MOQ 1 reel (2,000 pcs SOP-8 208-mil) or 100 pcs cut tape for prototypes. Shenzhen stock ships in 1-2 business days; Winbond authorized channel replenishment runs 8-14 weeks during NOR allocation cycles.
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