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DIP-8 / SOP-8 · TC4420
Microchip Technology · DIP-8 / SOP-8 · 6A MOSFET Gate Driver
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The TC4420 is Microchip's 6 A peak single-output high-speed MOSFET gate driver, and the detail that trips up most designers is that it is non-inverting: the output follows the input polarity, whereas the pin-compatible TC4429 (and the older TC429) inverts it. Both are fabricated in CMOS rather than bipolar, which is why supply current is only 0.45 mA typical with a logic-1 input and 55 µA typical with the input low — an order of magnitude better than classic bipolar drivers of the same era. Supply range is 4.5 V to 18 V, so a single 5 V, 12 V or 15 V rail powers it directly.
The output stage is built for hard switching. Peak output current is 6.0 A at VDD = 18 V, rise and fall times are 25 ns typical and 35 ns maximum into a 2500 pF load, and propagation delay is 55 ns typical with 75 ns maximum. Output resistance is only 2.1 ohm on the high side and 1.5 ohm on the low side at 18 V (3 ohm and 2.3 ohm maximum over temperature), and the output swings to within 25 mV of both ground and VDD, so a 12 V rail gives close to a full 12 V gate drive. The device can drive capacitive loads up to 10000 pF and is essentially latch-up proof, withstanding more than 1.5 A of reverse current at up to 2 percent duty for 300 µs — the property that lets it replace three or more discrete components in a totem-pole buffer.
Inputs are TTL and CMOS compatible with VIH at 2.4 V minimum and VIL at 0.8 V maximum, and the input may be driven from -5 V to VDD + 0.3 V without upset or damage, which removes the need for external level shifting. Input current is only ±10 µA. Package options include the 8-lead PDIP (TC4420CPA for 0 °C to +70 °C, TC4420EPA for -40 °C to +85 °C), the 8-lead 150 mil SOIC (TC4420EOA), the 8-lead 6 × 5 DFN (TC4420VMF, -40 °C to +125 °C), the 8-lead CERDIP and the 5-lead TO-220 (TC4420CAT). Power dissipation is 1.6 W for the TO-220 (12.5 W with a heatsink, RθJC of 10 °C/W), 730 mW for the PDIP, 800 mW for the CERDIP and 470 mW for the SOIC. Note the datasheet instruction that in the 8-lead packages the duplicated VDD, GND and OUTPUT pins must all be connected for proper operation.
Design and sourcing guidance: put a 4.7 ohm to 10 ohm resistor in series with the gate to damp ringing and limit peak current, keep the driver's local decoupling — a 1 µF ceramic plus 10 µF bulk — within a few millimetres of the VDD pins, add a 10 kΩ gate-to-source pulldown so the MOSFET stays off while VDD ramps, and use a star connection between driver ground and power ground. The TC4420 is a low-side driver only: for a half bridge you need an IR2110-class floating driver or an isolated gate driver. Microchip originals carry laser marking with a date code and traceability code; remarked clones typically show slower edges and reduced peak current, which is easy to catch by measuring the gate waveform into a known capacitive load. MOQ is one tube (60 pcs PDIP, 100 pcs SOIC) or 100 pcs loose, with reel quantities of 3300 pcs for the SOIC. Shenzhen stock ships in one to two days; Microchip authorized-channel lead time is twelve to twenty-six weeks.
Specify the full Microchip order code including the temperature suffix — TC4420CPA, TC4420EPA, TC4420EOA, TC4420CAT or TC4420VMF — because the pinout is identical across packages and a procurement substitution can silently change your thermal budget. When ordering for a half-bridge design, double-check that you are not being quoted the inverting TC4429 instead.
The TC4420 is non-inverting — the output goes high when the input goes high. The TC4429 is the inverting version and the two are pin-compatible in the same packages, as is the older TC429. Microchip sells them from one datasheet because the die family is shared. Mixing them up in a BOM is a classic error: a board designed for the TC4429 and fitted with a TC4420 will invert the PWM and, in a synchronous converter, will cause shoot-through. Always verify the suffix on the marking, not just the pinout.
The TC4420 is a single low-side output rated for gates referenced to ground, with 6 A of peak drive from a 4.5 V to 18 V supply. The IR2110 provides two channels, one of which is a floating high-side driver rated to a 500 V bootstrap offset, but only 2 A peak and needing a 10 V to 20 V gate supply. If you are switching one MOSFET to ground, use the TC4420. If you are building a half bridge or a full bridge with a high-side N-channel device, you need the IR2110 or an isolated gate driver. Do not try to bootstrap a TC4420 — its input and supply are both ground referenced.
Start with a 4.7 ohm to 10 ohm series gate resistor: it damps ringing caused by the gate loop inductance, limits peak current (6 A into a low-inductance loop will ring badly and can radiate), and lets you tune turn-on and turn-off separately with anti-parallel diodes if needed. Decouple VDD with a 1 µF ceramic plus a 10 µF bulk capacitor as close to the duplicated VDD pins as possible, connect both VDD pins and both GND pins, and keep the ground return path short and wide. A 10 kΩ gate-to-source pulldown keeps the MOSFET off during power-up.
Yes. VIH is 2.4 V minimum and VIL is 0.8 V maximum, so a 3.3 V CMOS output has comfortable margin, and the input current is only ±10 µA. The input can even be driven from -5 V to VDD + 0.3 V without damage, which removes the need for level shifting in most designs. Remember that the gate drive amplitude equals VDD, so if you need 10 V to 12 V on the gate for a standard-level MOSFET, power the TC4420 from 12 V while driving its input from the 3.3 V MCU.
Propagation delay is 55 ns typical and 75 ns maximum, with matched 25 ns rise and fall times into 2500 pF, so practical PWM frequencies of 100 kHz to 500 kHz are straightforward and above 1 MHz is possible with small gate charges. The limit is usually the MOSFET's gate charge and the layout, not the driver. Budget gate-drive power as Qg × VDD × fsw: a 60 nC device at 12 V and 500 kHz dissipates about 0.36 W just in gate charging, which must come out of the driver's own thermal budget in the SOIC package (470 mW).
The 8-lead SOIC (TC4420EOA) is the mainstream production choice at 470 mW dissipation and -40 °C to +85 °C, but it is thermally limited — at high gate charge and high frequency the die temperature rises quickly. The 5-lead TO-220 (TC4420CAT) dissipates 1.6 W bare and 12.5 W with a heatsink at 10 °C/W junction-to-case, so it is the right choice above roughly 200 kHz into a large MOSFET. The 8-lead DFN (TC4420VMF) offers the widest temperature range at -40 °C to +125 °C in a small footprint. The 8-lead PDIP remains popular for prototypes and field-serviceable equipment.
Measure the output. Drive the input with a 500 kHz square wave into a known capacitive load and check the edge rate and the peak current: genuine Microchip parts show 25 ns typical edges into 2500 pF and a rail-to-rail swing within 25 mV, while remarked clones show visibly slower edges and sagging highs. Also verify the marking — the correct part number, temperature code (C, E or V) and a Microchip date plus traceability code — and confirm the polarity: remarked TC4429 parts sold as TC4420 will invert your signal. We electrically sample-test every reel and provide lot traceability.
MOQ is one tube (60 pcs for the 8-lead PDIP TC4420CPA, 100 pcs for the SOIC) or 100 pcs loose for prototyping, with tape-and-reel quantities of about 3300 pcs for the SOIC. Shenzhen stock ships in one to two business days; Microchip authorized-channel lead time is twelve to twenty-six weeks depending on allocation, so qualify a second source such as the TC4427 or MCP14A0601 early.
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