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LQFP-48 · W5500
ActiveHardware TCP/IP Ethernet Controller
W5500
WIZnet · LQFP-48 · Hardware TCP/IP Ethernet Controller
Price on Request
Get a competitive quote within 24 hours. Volume discounts available. Shenzhen stock ships in 1-2 business days.
Overview
The W5500 is WIZnet's third-generation hardwired TCP/IP embedded Ethernet controller, and it remains the reference choice for adding wired networking to an SPI-only microcontroller. Unlike software stacks such as lwIP, the W5500 implements TCP, UDP, IPv4, ICMP, IGMP, ARP and PPPoE entirely in dedicated silicon, so the host MCU never executes a single line of protocol code. It exposes eight independent hardware sockets, each drawing transmit and receive buffer from a 32 KB on-chip memory that can be partitioned per socket, and the whole device is accessed over an SPI peripheral clockable up to 80 MHz — fast enough to saturate a 10/100 Mbps link from an STM32, ESP32 or even a Raspberry Pi Pico.
The integrated 10BASE-T/100BASE-TX MAC and PHY include auto MDI/MDIX crossover, so the external magnetics are the only passive network components required. A 25 MHz crystal feeds the internal PLL, the core runs on 3.3 V (2.97 V to 3.63 V), and I/O pins tolerate 3.3 V logic directly, with 5 V tolerance on selected pins easing level interfacing. The LQFP-48 package is hand-solderable, and WIZnet supplies ioLibrary driver code that ports to Arduino, Zephyr, FreeRTOS and bare-metal builds.
For sourcing, the W5500 competes with Microchip's ENC28J60 (software stack, much heavier MCU load) and the older W5100 (4 sockets, SPI limited to 70 MHz, smaller buffer). The W5500 is strictly superior in throughput and socket count. Genuine WIZnet stock carries crisp laser marking and the ioLibrary ecosystem assumes authentic silicon; remarked units show up as intermittent PHY failures. Shenzhen stock is deep, with MOQ from 1 tray (250 pcs) or cut tape for prototypes.
Key Features
- Hardware TCP/IP offload — zero protocol code on the host MCU
- 8 independent sockets with 32 KB configurable on-chip buffer
- SPI interface up to 80 MHz; saturates 10/100 Mbps Ethernet
- Integrated MAC + PHY with auto MDI/MDIX, single 3.3 V supply
Typical Applications
- Industrial controllers and PLCs adding wired Ethernet over SPI
- IoT gateways, smart-home hubs and network-enabled sensor nodes
- Point-of-sale terminals, vending machines and access controllers
- Ethernet shields and breakout boards for Arduino/RP2040 designs
- Data loggers streaming measurements to on-premise servers
Specifications
- Interface
- SPI (up to 80 MHz)
- Ethernet Speed
- 10/100 Mbps, MAC + PHY Integrated
- Hardware Protocols
- TCP, UDP, ICMP, IGMP, IPv4, ARP, PPPoE
- Independent Sockets
- 8
- On-Chip Tx/Rx Buffer
- 32 KB
- Supply Voltage
- 2.97 to 3.63 (3.3 V nominal) V
- Auto MDI/MDIX
- Yes
- Operating Temperature
- -40 to 85 °C
- Pins
- 48
- RoHS
- Compliant
Procurement Tips
Order the W5500 with matching RJ45-magjack (HR911105A or equivalent) and a 25 MHz crystal in one line to save freight — these three items ship together on nearly every W5500 BOM. Ask for VERSIONR test results on reels destined for volume production.
Frequently Asked Questions
How does the W5500 compare with the ENC28J60?
Both add Ethernet over SPI, but the ENC28J60 provides only MAC+PHY — the host must run a full TCP/IP stack in software (lwIP/uIP), consuming tens of KB of RAM and significant CPU. The W5500 implements the entire stack in hardware with eight sockets and 32 KB buffer, so a small Cortex-M0 can hold multiple simultaneous TCP connections.
What is the maximum throughput I can expect over SPI?
At the 80 MHz SPI clock maximum, sustained TCP throughput reaches roughly 35-40 Mbps for bulk transfers on STM32-class hosts. At the more common 20-36 MHz SPI clocks used with Arduino-class MCUs, expect 8-16 Mbps. The Ethernet side is 100 Mbps full duplex; the SPI bus is the bottleneck.
Can the W5500 run PPPoE or act as a router?
It supports PPPoE dial-up in hardware, which is why many ISPs-shipped MCU modems use WIZnet parts. It does not route or NAT — it is a host controller presenting eight socket endpoints to your MCU. For routing you still need a Linux-class SoC.
Does the W5500 support IPv6?
No. IPv4 only. If your product roadmap requires IPv6, consider the WIZnet W6100, which keeps socket compatibility while adding hardware IPv6 support.
How do I verify I received genuine WIZnet silicon, not remarked stock?
Read the VERSIONR register (0x0039) over SPI at boot — genuine W5500 returns 0x04. Counterfeit or remarked chips often fail this or show unstable PHY negotiation. Also check laser-etched WIZnet logo and consistent date-code format. We electrically test samples from every tray before dispatch.
What crystals and magnetics does the W5500 need?
A 25 MHz crystal (±30 ppm recommended) with 12-18 pF load capacitors, plus an RJ45 jack with integrated magnetics such as the HanRun HR911105A. A Bob Smith termination network on the unused PHY center taps improves EMI performance.
What is the MOQ and lead time from your Shenzhen warehouse?
MOQ is 1 tray (250 pcs LQFP-48) or 50 pcs loose cut tape for prototypes. In-stock items ship in 1-2 business days; WIZnet channel replenishment takes 2-4 weeks for volume beyond local stock.
Alternatives & Equivalents
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