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SOP-14 / DIP-14 · 74HC14
Nexperia · SOP-14 / DIP-14 · Hex Schmitt-Trigger Inverter
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The 74HC14 is a high-speed CMOS hex inverter with Schmitt-trigger inputs, containing six independent buffers that convert slowly changing, noisy or open-collector signals into sharply defined, jitter-free logic edges. Nexperia's version operates from a 2.0 V to 6.0 V supply, complies with JESD8C at 2.7 V to 3.6 V and JESD7A at 2.0 V to 6.0 V, and is specified over −40 °C to +85 °C and −40 °C to +125 °C in SO14, TSSOP14 and DHVQFN14 packages; through-hole DIP-14 versions remain available from TI and second sources.
The hysteresis is the whole point of the device. At VCC = 4.5 V the positive-going threshold is 2.38 V typical (1.7 V minimum, 3.15 V maximum) and the negative-going threshold is 1.4 V typical, giving about 0.98 V of hysteresis; at 6.0 V the hysteresis rises to 1.25 V typical. That window rejects contact bounce, cable-induced ringing and slow sensor edges that would make an ordinary inverter chatter. Inputs also include clamp diodes, so with a series current-limiting resistor the pins can be interfaced to voltages above VCC. Input rise and fall times are unlimited, which lets the part square up signals from long cables or resistive dividers.
Switching and drive capability are typical of the HC family: propagation delay is 41 ns at 2.0 V, 15 ns at 4.5 V and 12 ns at 6.0 V with CL = 50 pF, output transition time is 6 ns to 7 ns typical, and each output sources or sinks 5.2 mA at 6.0 V or 4.0 mA at 4.5 V while holding VOL below 0.26 V typical. Quiescent supply current is 2 µA maximum at 25 °C (40 µA maximum at 125 °C), power-dissipation capacitance is 7 pF per package, latch-up exceeds 100 mA per JESD 78 Class II Level B, and ESD protection exceeds 2 kV HBM.
Practical circuits include switch debouncing with a single RC network, astable relaxation oscillators where the frequency is set by R, C and the vendor's K-factor curve, monostable pulse stretchers, crystal oscillators, and cleanup of encoder or comparator outputs before they reach an MCU interrupt pin. Note that slow input edges cause additional supply current during the transition; Nexperia gives a formula for the extra dissipation when the input slew is known. For procurement, the 74HC14 is a commodity logic part with heavy competition: Nexperia 74HC14D,653 (SO14, 2,500 per reel), TI SN74HC14, onsemi MC74HC14A and Toshiba/Asian sources are all pin and function compatible. The 74HCT14 variant substitutes TTL-level thresholds (VIH 2.0 V, VIL 0.8 V) at 4.5 V to 5.5 V for mixed-voltage systems. MOQ is 1 reel or 100 pcs cut tape, shipping in 1-2 days from Shenzhen stock; remarking is uncommon but date-code and plating inspection is still worth doing on broker lots.
Put the exact orderable part number (for example Nexperia 74HC14D,653 or TI SN74HC14DR) on the BOM rather than a bare 74HC14, and buy the 125 °C grade for automotive-adjacent or outdoor enclosures — the price delta is negligible.
Same hex Schmitt-trigger inverter and pinout, different input thresholds. The 74HC14 accepts a 2.0 V to 6.0 V supply with thresholds that scale with VCC (VT+ about 2.38 V at 4.5 V); the 74HCT14 runs from 4.5 V to 5.5 V with fixed TTL thresholds (VIH 2.0 V, VIL 0.8 V) and less hysteresis, about 0.6 V. Use HCT when interfacing to 5 V TTL logic.
Both are hex Schmitt-trigger inverters, but the CD40106 belongs to the 4000B family: 3 V to 15 V supply, microamp-level static current, slower edges and only about 0.5 mA of drive. The 74HC14 is much faster (12 ns versus hundreds of nanoseconds) and drives ±5.2 mA, but is limited to 6 V. Choose CD40106 for 12 V systems and low speed, 74HC14 for logic-speed conditioning.
For debouncing, feed the switch node through a resistor to the input and place a small capacitor from input to ground — the hysteresis guarantees a single clean edge. For an astable oscillator, connect a resistor from output to input and a capacitor from input to ground; the frequency is set by the two thresholds and Nexperia publishes a K-factor curve so you can calculate f = 1/(K·R·C) accurately at your supply voltage.
Yes, but tie each unused input to VCC or GND rather than leaving it floating, and leave unused outputs unconnected. A floating Schmitt input can oscillate between thresholds, drawing extra supply current and injecting noise into adjacent gates on the same die.
Slow input edges keep both output transistors partially on during the transition. Nexperia specifies the additional supply current as Padd = fi × (tr + tf) × ΔICC(AV) × VCC, which can be hundreds of microamps per gate with millisecond edges. Add hysteresis-friendly buffering, reduce the edge rate or use a faster Schmitt family if power matters.
Nexperia's current 74HC14 catalogue focuses on SO14, TSSOP14 and DHVQFN14; DIP-14 versions are still produced by TI (SN74HC14N) and several Asian second sources. Specify the exact vendor part number on the BOM if your assembly line is through-hole.
MOQ 1 reel (2,500 pcs SO14) or 100 pcs cut tape for prototyping. Shenzhen stock ships in 1-2 business days; Nexperia authorized channel replenishment is 4-8 weeks.
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